QwenRSI Controller v0.1
An experimental compiled agent-controller bundle, produced by a frozen
Qwen3.5-4B model modifying its C harness. This repository contains real sparse
Qwenputer circuit coefficients (controller.safetensors), the selected RV32
program (controller.elf), source, hashes and measured evidence.
It is not a trained Qwen language model, a merged language-model checkpoint,
or a LoRA adapter. Qwen's language-model parameters are unchanged and loaded
separately. The circuit implements the CPU; the evolved program lives in its
initialized ROM/RAM state. Use the QwenRSI loader, not AutoModel.from_pretrained.
QwenRSI v0.2 runtime
Install QwenRSI v0.2
and pass jit=True to load_bundle to compile repeated RV32 execution paths
into guarded SwiGLU circuits. This bundle's ELF and tensor hashes are unchanged.
The benchmark report
records SWE-bench Verified and Aider Polyglot first-stage scores, timing and the
bundle replay check.
Measured run
Run: tom-20261110-003 on an NVIDIA RTX 4090. Actual model prompts/responses and
selected source provenance are preserved. 1 of
3 proposed controller versions were admitted.
| Measurement | Result |
|---|---|
| Synthetic repair protocol, seed controller | 0/256 |
| Synthetic repair protocol, selected controller | 216/256 |
| Synthetic repair protocol, human-written verified controller | 256/256 |
| Real Python repair pilot, seed controller | 4/4 |
| Real Python repair pilot, selected controller | 4/4 |
| Exported tensor reload audit | 392 free-running trace tokens, 0 mismatches |
The simulator starts from a deliberately incomplete policy. A hand-written
verified policy is also reported in evidence/human-comparison/results.json.
The simulator result is simulation-only protocol improvement. The four
Python tasks are an authored integration pilot, not evidence of broad coding
improvement. The final test split was excluded from candidate selection.
Meta-selector edits are tracked but do not prove recursive improvement in the
improvement mechanism. This section records the original v0.1 evaluation.
Load
Install the source project with GPU dependencies on Linux, then:
from huggingface_hub import snapshot_download
from qwenrsi.circuit import load_bundle
path = snapshot_download("StoneZhang/QwenRSI-Controller-v0.1")
controller = load_bundle(path, device="cuda:0", jit=True)
print(controller.decide([1, 1, 0, 0, 1, 8, 4]))
load_bundle verifies SHA-256, loads the sparse coefficient tensors and
initializes the program from the ELF. Circuit decisions are generated freely;
reference outputs are used only for post-run comparisons. The host still
handles compilation, state initialization, evaluation, file I/O and model
scheduling. This is the upstream circuit's Triton execution path, not stock
Transformers generate() on one merged model.
Attribution and license
Qwenputer's compiled RV32 CPU, DeltaNet memory and executor are by Divyansh
Agrawal, MIT, pinned at 0cab57038a8b218dabe481f994174c3437405e3d.
QwenRSI's controller/evolution/packaging code is by Tong Zhang, MIT.
Qwen/Qwen3.5-4B is a separate upstream model under its own license; its weights
are not included here. See LICENSE and QWENPUTER_LICENSE.